ESA - Figure 2 Unpopulated mezzanine-board on the left, mezzanine-board implementing an IGLOO2-driven payload processor with external DDR3 on the right; the IGLOO2 is reconfigurable by the GR716 via SPI.
M2GL005-VFG256I - Microchip - FPGA, IGLOO2, PLL
All IGLOO2 FPGA and SmartFusion2 SoC Families - VEKEMO FPGA